Low switching error, small capacitors, auto-zero offset buffer amplifier
US8698556B2 · kind B2 · utility
4Cited by
4References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 6, 2012 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | May 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45968
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Switching error in an auto-zero offset amplifier is reduced by keeping a clock level to the auto-zero switches at an amplitude just enough to insure complete switching of the switches of the auto-zero offset buffer amplifier. A level shifting circuit provides the clock at the desired level control and a local voltage regulator provides a regulated voltage to the level shifting circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.