Patent · US Active

Method and system for diagnosing a fault or open circuit in a network

US8699356B2 · kind B2 · utility

11Cited by
18References
17Claims
0Family size

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Key dates

Filing dateMay 3, 2011
Grant dateApr 15, 2014
Priority date
Expiry dateApr 3, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L2012/40215
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A fault injection circuit injects a test signal into a data bus with a normal high logic level and a normal low logic level. The test signal has a greater logic level greater than the normal high logic level of the data bus or a lower logic level lower than the normal low logic level of the data bus. An analog-to-digital converter is coupled to a voltage level detector for sensing an aggregate level of an aggregate signal on the data bus. The aggregate signal is composed of the termination circuit signal and the test signal. A diagnostic tool determines whether a faulty connection between the data bus and a network device exists, where the sensed aggregate level exceeds at least one of the normal high logic level and the normal low logic level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.