Leveraging multicore systems when compiling procedures
US8701098B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2009 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | Nov 7, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus and program product are provided for parallelizing analysis and optimization in a compiler. A plurality of basic blocks and a subset of data points of a computer program is prepared for processing by a main thread selected from a plurality of hardware threads. The plurality of prepared basic blocks and subset of data points are placed in a shared data structure by the main thread. A prepared basic block of the plurality of prepared basic blocks and/or a tuple associated with the subset of data points is concurrently retrieved from the shared data structure by a work thread selected from the plurality of hardware threads. A compiler analysis or optimization is performed on the prepared basic block or tuple by the work thread.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.