Fabrication technique for gallium nitride substrates
US8703623B2 · kind B2 · utility
5Cited by
2References
10Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 1, 2009 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | Sep 5, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor arrangement is provided that includes one or more substrate structures. One or more nitride-based material structures are used in fabricating nitride-based devices. One or more intermediary layers are interposed between the one or more substrate structures and the one or more nitride-based material structures. The one or more intermediary layers support the lattice mismatch and thermal expansion coefficients between the one or more nitride-based material structure and the one or more substrate structures. Several new electronic devices based on this arrangement are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.