Ultra-small chip package and method for manufacturing the same
US8704344B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2012 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | Oct 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the present disclosure provide the design and manufacture of an ultra-small chip assembly. The ultra-small chip assembly comprises a die, a plate-like back electrode disposed on the back-side of the die, and one or more plate-like positive electrodes disposed on the front-side of the die. The ultra-small chip assembly is configured such that one end of the plate-like back electrode extends beyond a first side of the die, and each of the one or more plate-like positive electrodes includes an end which extends beyond a second side of the die. By attaching both the plate-like back electrode and the plate-like positive electrodes on the surfaces of the die, and directly using the exposed ends of the plate-like electrodes as the lead-out electrodes for the chip assembly, the electrical connections outside of the die only occupy a very small volume.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.