Interface plate between integrated circuits
US8704363B2 · kind B2 · utility
1Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2010 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | Jul 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06517
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interface plate capable of being mounted between first and second surface-mounted electronic chips. The plate includes a plurality of first, second, and third through openings, the first openings being filled with a conductive material and being arranged to be in front of pads of the first and second chips during the assembly, the second openings being filled with a second material, the third openings being filled with a third material, the second and third materials forming two complementary components of a thermoelectric couple.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.