Method and system for synchronizing the phase of a plurality of divider circuits in a local-oscillator signal path
US8704559B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2012 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | Feb 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/665
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and system for synchronizing the output signal phase of a plurality of frequency divider circuits in a local-oscillator (LO) or clock signal path is disclosed. The LO path includes a plurality of frequency divider circuits and a LO buffer for receiving a LO signal coupled to the plurality of frequency divider circuits. The method and system comprise adding offset voltage and setting predetermined state to each of the frequency divider circuits; and enabling the frequency divider circuits. The method and system includes enabling the LO buffer to provide the LO signal to the frequency divider circuits after they have been enabled. When the LO signal drives each of the frequency divider circuits, each of the frequency divider circuits starts an operation. Finally the method and system comprise removing the offset voltage from each of the frequency divider circuits to allow them to effectively drive other circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.