Single-phase and three-phase dual buck-boost/buck power factor correction circuits and controlling method thereof
US8705254B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2010 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | Aug 5, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The configurations of a single-phase dual buck-boost/buck power factor correction (PFC) circuit and a controlling method thereof are provided in the present invention. The proposed circuit includes a single-phase three-level buck-boost PFC circuit receiving an input voltage and having a first output terminal, a neutral-point and a second output terminal for outputting a first and a second output voltages, a single-phase three-level buck PFC circuit receiving the input voltage and coupled to the first output terminal, the neutral-point and the second output terminal, a first output capacitor coupled to the first output terminal and the neutral-point, a second output capacitor coupled to the neutral-point and the second output terminal, and a neutral line coupled to the neutral-point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.