Flash memory device and method of programming same
US8705284B2 · kind B2 · utility
0Cited by
2References
3Claims
0Family size
Assignee
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Key dates
| Filing date | May 10, 2013 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | May 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory device includes a memory cell array made up of memory cells arranged in rows and columns. A first page of data is programmed in selected memory cells of the memory cell array, and a second page of data is subsequently programmed in the selected memory cells. The first page of data is programmed using a program voltage having a first start value, and the second page of data is programmed using a program voltage having a second start value determined by a programming characteristic of the selected memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.