No-multiply digital signal processing method
US8706794B1 · kind B1 · utility
Inventors
Key dates
| Filing date | Aug 23, 2011 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | Nov 7, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/4806
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for processing a digital signal, comprising the following steps: receiving a complex-valued input data array with a processor; converting the complex-valued input data array into a quantized polar domain by approximating magnitude and quantizing the phase data of the input data array with the processor; storing the approximated magnitude in a phase-column indexed matrix in a memory store that is operatively coupled to the processor; processing the input data array with the processor such that all multiplications and summations that would occur during signal processing of the input data array in the Cartesian domain are substituted with circular row shifts and additions of phase-column indexed values in the quantized polar domain; and converting the processed input data array back into the Cartesian domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.