On-demand predicate registers
US8707013B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2010 |
| Grant date | Apr 22, 2014 |
| Priority date | — |
| Expiry date | Dec 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3822
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with at least some embodiments, a digital signal processor (DSP) includes an instruction fetch unit and an instruction decode unit in communication with the instruction fetch unit. The DSP also includes a register set and a plurality of work units in communication with the instruction decode unit. The register set includes a plurality of legacy predicate registers. Separate from the legacy predicate registers, a plurality of on-demand predicate registers are selectively signaled without changing the opcode space for the DSP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.