Patent · US Active

Method and system for implementing hierarchical prototyping of electronic designs

US8707228B1 · kind B1 · utility

3Cited by

8References

40Claims

0Family size

Assignee

Cadence Design Systems, Inc. · US

Inventors

Paul W. Kollaritsch · Nacogdoches, US
Ping-Chih Wu · Cupertino, US

Key dates

Filing date	Apr 29, 2011
Grant date	Apr 22, 2014
Priority date	—
Expiry date	Apr 29, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/12
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Disclosed are improved methods, systems, and computer program products for implementing flexible models to perform efficient prototyping of electronic designs, which allows for very efficient analysis of the electronic designs. The flexible models allow many of the existing tools for designing electronics to perform more efficiently.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.