Semiconductor assembly and semiconductor package including a solder channel
US8710657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2011 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Jan 26, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor packages connecting a semiconductor chip to an external device by bumps are provided. The semiconductor packages may include a connection pad on a semiconductor chip, a connecting bump on and configured to be electrically connected to the connection pad and a supporting bump on the semiconductor chip and configured to be electrically isolated from the connection pad. The connection bump may include a first pillar and a first solder ball and the supporting bump may include a second pillar and a second solder ball. The semiconductor packages may further include a solder channel in the second pillar configured to allow a portion of the second solder ball to extend into the solder channel along a predetermined direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.