Methods and apparatuses for configuring and operating graphics processing units
US8711153B2 · kind B2 · utility
1Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2007 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Feb 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing system with multiple graphics processing cores (GPC)s is disclosed. The apparatus can include a peripheral component interface express (PCIe) switch to interface the GPCs to a host processor. The apparatus can also include a transparent bus to connect the GPCs. The transparent bus can be implemented with two PCIe endpoints on each side of a nontransparent bridge where these three components provide a bus interconnect and a control line interconnect between the GPCs. Other embodiments are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.