Method and system for remapping processing elements in a pipeline of a graphics processing unit
US8711156B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2004 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Jul 6, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for remapping units that are disabled to active units in a 3-D graphics pipeline. Specifically, in one embodiment, a method remaps processing elements in a pipeline of a graphics pipeline unit. Graphical input data are received. Then the number of enabled processing elements are determined from a plurality of processing elements. Each of the enabled processing elements are virtually addressed above a translator to virtually process the graphical input data. Then, the virtual addresses of each of the enabled processing elements are mapped to physical addresses of the enabled processing elements at the translator. The graphical input data are physically processed at the physical addresses of the enabled processing elements. In addition, each of the enabled processing elements are physically addressed below the translator to further process the graphical input data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.