Arbitration circuit to arbitrate conflict between read/write command and scan command and display driver integrated circuit having the same
US8711162B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2010 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Jan 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/20
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An arbitration circuit to arbitrate an issue between a read/write command and a scan command and a display driver integrated circuit including the arbitration circuit. The arbitration circuit includes a latch unit having a first latch circuit that latches and outputs a first signal related to a scan command and a second latch circuit that latches and outputs a second signal related to a read/write command, wherein the latch unit resets outputs of the first latch circuit and/or the second latch circuit in response to a ready signal related to a memory operation, and a maintaining unit to receive outputs of the first latch circuit and the second latch circuit, to generate a first internal signal to activate a scanning operation and a second internal signal to activate a reading/writing operation, maintain the first internal signal and the second internal signal, and to selectively activate the first internal signal or the second internal signal by changing the state of at least one of the first internal signal and second internal signal in response to the reset operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.