Delta-sigma AD converter circuit and battery pack
US8712709B2 · kind B2 · utility
1Cited by
6References
11Claims
0Family size
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Inventor
Key dates
| Filing date | Jan 12, 2010 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Nov 15, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/10
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A delta-sigma AD converter circuit includes a plurality of registers to store plural data obtained by dividing data stored in the shift register and to hold the plural data in such a form that each of the plural data is readable independently of the others, wherein one or more of the plurality of registers store the pulse density modulated data stored in the shift register in response to the register store instruction signal, and the filtering unit reads the pulse density modulated data from one or more of the plurality of registers responsive to the mode in response to the read request signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.