Hardware/software debugging using memory access parameters
US8713369B2 · kind B2 · utility
1Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 8, 2011 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Feb 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Debug circuitry is operated in a manner that facilitates debugging one or more hardware and/or software components that are included in a system that includes a system memory. The debug circuitry receives information from one of the hardware and/or software components and/or from the system memory, and ascertains whether the received information includes memory address parameters. If the received information includes memory address parameters, then the memory address parameters are used to retrieve data from the system memory. The retrieved data is supplied at an output port of the debug circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.