Methods and systems to reduce a number of simulations in a timing analysis
US8713502B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2013 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Feb 26, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for determining timing constraint analysis of an integrated circuit (IC) may include defining a sequence of sample points for timing constraint analysis of an n×n matrix, each sample point corresponding to a timing arc of the IC that includes data and reference slews; initially simulating extreme sample points of the matrix, according to the sequence, by substituting timing constraints from liberty files of the IC type for time values of the data slews and conducting a binary search for optimized timing constraints; and interpolating other sample points, according to the sequence, each of the other sample points having a starting bisection point that results from linear interpolation of the timing constraint analysis from adjoining sample points, which were simulated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.