Fabrication of lateral double-diffused metal oxide semiconductor (LDMOS) devices

US8716795B2 · kind B2 · utility

Assignees

• Silergy Technology · US
• Silergy Semiconductor Technology (Hangzhou) Ltd. · CN

Inventor

• Budong You · Hangzhou City, CN

Key dates

• Filing date: Dec 21, 2011
• Grant date: May 6, 2014
• Expiry date: Oct 16, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Methods of making, structures, devices, and/or applications for lateral double-diffused metal oxide semiconductor (LDMOS) transistors are disclosed. In one embodiment, a method of fabricating an LDMOS transistor with source, drain, and gate regions on a substrate, can include: forming p-type and n-type buried layer (PBL, NBL) regions; growing an epitaxial (N-EPI) layer on the NBL/PBL regions; forming a p-doped deep p-well (DPW) region on the PBL region; forming a well region in the N-EPI layer; forming a doped body region; forming an active area and a field oxide (FOX) region, and forming a drain oxide between the source and drain regions of the LDMOS transistor; forming a gate oxide adjacent to the source and drain regions, and forming a gate on the gate oxide and a portion of the drain oxide; and forming a doped drain region, and first and second doped source regions.