Interfacial layer regrowth control in high-K gate structure for field effect transistor

US8716812B2 · kind B2 · utility

Assignee

• NXP B.V. · NL

Inventors

• Markus Mueller · Heilbronn, DE
• Guillaume Boccardi · Woluwe-Saint-Lambert - Sint-Lambrechts-Woluwe, BE
• Jasmine Petry · Brussels, BE

Key dates

• Filing date: Jun 24, 2009
• Grant date: May 6, 2014
• Expiry date: Jan 24, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/66
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A field effect transistor having a gate structure comprising a high-K dielectric layer, a gate electrode located on the high-K dielectric layer, and an interfacial layer located in between the high-K dielectric layer and a channel region of the field effect transistor. The interfacial layer comprises a layer of SiO2 containing a regrowth inhibiting agent. A method of forming the gate structure includes forming a gate stack comprising, in order: a SiO2 layer adjacent a channel region of the field effect transistor; a high-K dielectric layer on the SiO2 layer; and a gate electrode on the high-K dielectric layer. The method also includes introducing a regrowth inhibiting agent into the SiO2 layer and then annealing the gate structure. The presence of the regrowth inhibiting agent in the SiO2 interfacial layer inhibits regrowth of the SiO2 layer into the channel region during the annealing step.