SOI-based CMUT device with buried electrodes
US8716816B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 12, 2011 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Feb 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A multi-layer stacked micro-electro-mechanical (MEMS) device that acts as a capacitive micromachined ultrasonic transducer (CMUT) with a hermetically sealed device cavity formed by a wafer bonding process with semiconductor and insulator layers. The CMUT design uses a doped Si SOI and wafer bonding fabrication method, and is composed of semiconductor layers, insulator layers, and metal layers. Conventional doped silicon may be used for electrode layers. Other suitable semi-conductor materials such as silicon carbide may be used for the electrode layers. The insulator may be silicon oxide, silicon nitride or other suitable dielectric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.