Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device
US8716836B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 26, 2008 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Jan 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers a portion of the wafer and an open region that does not cover a portion of the wafer within the covering region; a Ge layer that is crystal-grown in the open region; and a functional layer that is crystal-grown on the Ge layer. The Ge layer may be formed by annealing with a temperature and duration that enables movement of crystal defects, and the annealing is repeated a plurality of times.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.