Current mirror circuit
US8717092B1 · kind B1 · utility
1Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2012 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Dec 21, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/267
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An improved current mirror circuit. The current mirror circuit includes a current mirror base network, a current source transistor, and an error transistor. The current mirror base network includes a first terminal, a second terminal, and a third terminal. The first terminal is connected to the current source transistor through a first impedance element. The second terminal is connected to the error transistor. The third terminal is connected to a first bias voltage source, and the first terminal is connected to a second bias voltage source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.