Techniques to improve the stress issue in cascode power amplifier design
US8717103B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2011 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Dec 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/541
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier includes a first transistor, and a first inductor disposed between the first transistor and a voltage source. A first output node is between the first transistor and the first inductor. The amplifier further includes a second inductor disposed between the first transistor and ground. The amplifier further includes a second transistor, and a third inductor disposed between the second transistor and a ground. A second output node is between the second transistor and the third inductor. The amplifier further includes a fourth inductor disposed between the second transistor and the voltage source. The amplifier further includes a first capacitor disposed between the first output node and the second output node, and a second capacitor disposed between a first mid-node, which is between the first transistor and the first inductor, and a second mid-node, which is between the second transistor and fourth inductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.