Multi-layered component
US8717120B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2010 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Sep 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2001/0085
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multi-layered component is disclosed, including at least one inductive region, wherein the inductive region includes a ferrite ceramic. The inductive region has electrode structures that form at least one inductance. The multi-layered component has at least one capacitive region, wherein at least one capacitive region includes a varistor ceramic. The capacitive region forms at least one capacitance. At least one inductive region and at least one capacitive region form at least one LC filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.