Three-phase buck-boost power factor correction circuit and controlling method thereof
US8717789B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2012 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Mar 23, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The configurations of a three-phase buck-boost power factor correction (PFC) circuit and a controlling method thereof are provided in the present invention. The proposed circuit includes a first single-phase buck-boost PFC circuit receiving a first phase voltage and having a first and a second output terminals and a neutral-point for outputting a first and a second output voltages, a second single-phase buck-boost PFC circuit receiving a second phase voltage and coupled to the first and the second output terminals and the neutral-point, a third single-phase buck-boost PFC circuit receiving a third phase voltage and coupled to the first and the second output terminals and the neutral-point, a first and a second output capacitors coupled to the first and the second output terminals respectively, and to the neutral-point also and a neutral line coupled to the neutral-point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.