Patent · US Active

Transferring data between memories over a local bus

US8719532B2 · kind B2 · utility

4Cited by
2References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 14, 2011
Grant dateMay 6, 2014
Priority date
Expiry dateJan 11, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/1673
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory apparatus includes a local bus, a plurality of non-volatile memories, a first buffer, and a main controller. The non-volatile memories share the local bus. The first buffer is connected to the plurality of non-volatile memories via the local bus. The first buffer buffers data stored in the plurality of non-volatile memories. The main controller is configured to generate a control signal for controlling the first buffer to buffer data stored in a source memory of the plurality of non-volatile memories and transmit the data to a target memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.