Data verification method
US8719580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2010 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Oct 6, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/64
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
(EN)An electronic system (1) comprises a trusted processor (2), a trusted cache memory (3) and a mass storage memory (4). The data are stored in the mass storage memory (4), where the memories are divided into blocks, each block is identified by an address and the data are addressed via a verification tree. The verification tree is a tree structure comprising nodes where descendent nodes are attached to a root node and each node stores the address of the block containing each of its child nodes and a digest value of each block. A method for the verification of the data of such an electronic system comprises access to searched data at the same time reporting the corruption of data if a calculated digest is different from the current digest value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.