Method for encoder frequency-shift compensation
US8719616B2 · kind B2 · utility
0Cited by
7References
21Claims
0Family size
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Key dates
| Filing date | Feb 22, 2013 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Feb 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/3174
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for encoder frequency-shift compensation includes determining frequency values of an input encoder signal, determining repeatable frequency-shifts of the frequency values and generating a frequency-shift compensated clock using the repeatable frequency-shifts. A frequency-shift compensated clock includes a synthesizer configured to generate a frequency-shift compensated clock signal using repeatable frequency shifts and encoder clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.