Patent · US Active

Method and apparatus for monitoring interrupts during a power down event at a processor

US8719630B2 · kind B2 · utility

0Cited by
7References
25Claims
0Family size

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Key dates

Filing dateAug 23, 2010
Grant dateMay 6, 2014
Priority date
Expiry dateAug 9, 2031

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D30/50
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In a particular embodiment, a method of monitoring interrupts during a power down event at a processor includes activating an interrupt monitor to detect interrupts. The method also includes isolating an interrupt controller of the processor from the interrupt monitor, where the interrupt controller shares a power domain with the processor. The method also includes detecting interrupts at the interrupt monitor during a power down time period associated with the power down event.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.