Method to increase yield and reduce down time in semiconductor fabrication units by preconditioning components using sub-aperture reactive atom etch
US8721906B2 · kind B2 · utility
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11Claims
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Key dates
| Filing date | Jun 2, 2009 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Apr 5, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49718
- WIPO fieldMaterials, metallurgy
- WIPO sectorChemistry
Abstract
An embodiment of the present inventions provides a method for preconditioning a semiconductor fabrication component using a plasma etching process and an optional enhanced ultrasonic and/or megasonic preconditioning step in order to eliminate the need for a burn-in period typically associated with said components, as well as extend the useful life of the component during its wear-out phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.