Method and structure for high Q varactor

US8722475B2 · kind B2 · utility

Assignee

• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

• Zhen Chen · Shanghai, CN
• Yung-Feng Lin · Shanghai, CN

Key dates

• Filing date: Jan 6, 2011
• Grant date: May 13, 2014
• Expiry date: Jan 6, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/66

Abstract

A method for forming a variable capacitor includes providing a semiconductor substrate of a first conductivity type and forming an active region of a second conductivity type within the substrate. The method forms a first dielectric layer overlying the active region. The method provides a conductive gate layer over the first dielectric layer and selectively patterns the conductive gate layer to form a plurality of holes in the conductive gate layer. A perimeter of the holes and a spacing between a first and a second holes are selective to provide a high quality factor (Q) of the capacitor. The method implants impurities of the second conductivity type into the active region through the plurality of holes in the conductive layer. The method also includes providing a second dielectric layer and patterning the second dielectric layer to form contacts to the active region and the gate.