Patent · US Active

Production of high alignment marks and such alignment marks on a semiconductor wafer

US8722506B2 · kind B2 · utility

4Cited by
18References
27Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 23, 2009
Grant dateMay 13, 2014
Priority date
Expiry dateDec 23, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

The invention relates to production of alignment marks on a semiconductor wafer with the use of a light-opaque layer (17), wherein, before the light-opaque layer (17) is applied, by means of the etching of cavities, free-standing pillar groups are produced in the cavities and then the light-opaque layer (17) is applied. The pillars are produced with a height of above 1 μm, which, moreover, is greater than a thickness of the light-opaque layer (17) to be applied in the cavities as layer portions (17x; 17y). The cavities are formed with a width such that they are filled only partly with the layer portions (17x; 17y) when the light-opaque layer (17) is applied. The high, freely positioned alignment marks produced by the method as pillar series (16x; 16y), having a plurality of individual pillars (16a; 16a′) in a cavity (12a, 12y), of a scribing trench on the semiconductor wafer are likewise described.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.