Adjustable pole and zero location for a second order low pass filter used in a phase lock loop circuit
US8723567B1 · kind B1 · utility
7Cited by
9References
12Claims
0Family size
Inventor
Key dates
| Filing date | Nov 1, 2012 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Nov 1, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention provides a loop filter device and a method for IC designers to adjust the pole or zero location of a phase lock loop (PLL) circuit. The pole and zero location are controlled by an amplifier and some on-chip resistor and capacitor components. The effective capacitance is magnified by the gain of the amplifier. The advantage of the loop filter device and the method according to embodiments of the present invention provides a feasible way to achieve a very low bandwidth in the PLL circuit without a huge external surface-mount capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.