Method and arrangement for voltage controlled oscillator device
US8723608B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2008 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Nov 18, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B5/1852
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention relate to a self injection locked voltage controlled oscillator arrangement, a pair of coupled first and second voltage controlled oscillator devices are arranged on a chip, an amplifier device is arranged on the same of the refection type chip, and an off-chip delay line is arranged with one terminal connected to an output terminal of the coupled first and second voltage controlled oscillator devices, and on terminal adapted to reflect a signal from the output terminal, the amplifier device being arranged to amplify an injection signal from said output terminal and to supply the amplified injection signal to one of said first and second voltage controlled oscillation devices to provide a VCO arrangement that exhibits low phase noise and a small size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.