Apparatus for selective word-line boost on a memory cell
US8724373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2012 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Sep 11, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4085
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for selectively boosting word-line (WL) voltage in a memory cell array. The method relies several embodiments to minimize energy costs associated with WL boost scheme. One embodiment generates a transient voltage boost rather than supply a DC voltage boost. The transient boost generation may be controlled on a cycle basis and can be disabled when the array is not accessed. Another embodiment allows the system to generate the transient voltage boost locally, near a WL driver and only during the cycles when it is needed. Localized boost voltage generation reduces the load capacitance that needs to be boosted to higher voltage. Another embodiment efficiently distributes the transient boost to the WL drivers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.