nvSRAM with inverted recall
US8724386B1 · kind B1 · utility
0Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2013 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Jun 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A RECALL process in a memory circuit includes RECALLing the state of a volatile memory cell from a nonvolatile memory cell, and inverting an output of the volatile memory cell after every other RECALL.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.