Patent · US Active

Storage system with flash memory, and storage control method

US8725936B2 · kind B2 · utility

6Cited by
1References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 30, 2012
Grant dateMay 13, 2014
Priority date
Expiry dateMar 30, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/0793
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A storage system has: one or more flash memory chips, each of which has a storage region configured by a plurality of blocks; and a device controller that controls access to data corresponding to the storage regions of the flash memory chips. The device controller manages for each of the blocks the number of determination readings for determining read disturb on the basis of a read request with respect to data of each block from a higher-level device, and, when there is a block for which the number of determination readings becomes equal to or larger than a threshold represented as a standard indicating a predetermined state related to read disturb, transmits, to the higher-level device, notification information that includes information indicating that read disturb of the block enters the predetermined state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.