Cyclic redundancy check generation via distributed time multiplexed linear feedback shift registers
US8726124B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2012 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Jul 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6575
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Cyclic redundancy check (CRC) values are efficiently calculated using an improved linear feedback shift register (LFSR) circuit. CRC value generation is separated into two sub-calculations, which are then combined to form a final CRC value. A programmable XOR engine performs logic functions via a table lookup rather than via a random logic circuit. LCRC and ECRC calculations are performed using a single shared LFSR circuit. Multiple links share the same CRC value generator. One advantage of the present invention is that CRC values are generated using smaller and fewer LFSR circuits relative to conventional circuit designs. As a result, a CRC value generator utilizing the disclosed techniques consumes less surface area of an integrated circuit and consumes less power, resulting in cooler operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.