MOS P-N junction diode device and method for manufacturing the same
US8728878B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2013 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Jan 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/124
Abstract
A MOS P-N junction diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. The method for manufacturing such diode device includes several ion-implanting steps. After the gate structure is formed by isotropic etching using a patterned photo-resist layer as a mask, an ion-implanting step is performed using the patterned photo-resist layer as a mask to form a deeper doped sub-region. Then, another ion-implanting step is performed using the gate structure as a mask to form a shallower doped sub-region between the gate structure and the deeper doped sub-region. The formed MOS P-N junction diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.