Nonvolatile semiconductor memory device
US8729620B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2007 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Apr 28, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
It is an object to provide a nonvolatile semiconductor memory device having excellent writing property and charge-retention property. A semiconductor layer including a channel forming region between a pair of impurity regions which are formed to be apart from each other is provided. In an upper layer portion thereof, a first insulating layer, a floating gate, a second insulating layer, and a control gate are provided. The floating gate has at least a two-layer structure, and a first layer in contact with the first insulating layer preferably has a band gap smaller than that of the semiconductor layer. Furthermore, by setting an energy level at the bottom of the conduction band of the floating gate lower than that of the channel forming region of the semiconductor layer, injectability of carriers and a charge-retention property can be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.