Patent · US Active

Switched power regulator with error signal estimation and presetting

US8729880B2 · kind B2 · utility

3Cited by
7References
30Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 22, 2010
Grant dateMay 20, 2014
Priority date
Expiry dateAug 7, 2031

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02B70/10
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A regulator circuit comprising an input for receiving an input voltage; an output stage, configured to switch between said input voltage and a reference voltage to generate an output voltage, in dependence on a modulated signal; a controller, configured to receive an error signal (VERROR) on a control input and to provide the modulated signal to said output stage; an error amplifier, for providing the error signal to the controller in dependence on the output voltage; and presetting circuitry, configured to estimate the error signal in dependence on at least the input voltage, and for presetting the control input with the estimated error signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.