Interleaved ADC calibration
US8730072B2 · kind B2 · utility
12Cited by
10References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2012 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Nov 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/36
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present disclosure includes calibration circuitry for adjusting the bandwidth of at least one sub-converter of an interleaved analog to digital converter (ADC), the at least one sub-converter having an input switch coupled to an input line of the ADC, the calibration circuitry having a control circuit adapted to adjust a bulk voltage of a transistor forming the input switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.