Distributed phased array testing device
US8730097B1 · kind B1 · utility
5Cited by
14References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 10, 2011 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Apr 4, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S2013/0254
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system for testing a phased array comprising a phase-locked loop circuit responsive to a received output signal of the phased array. The phase-locked loop circuit comprises a phase detector; a filtering element, a variable frequency oscillator and a feedback loop. The system is configured to output at least one of a value indicative of the output of the phase detector and a value indicative of the output of the filtering element for estimating at least one of an imparted phase shift and an imparted frequency modulation by array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.