Method and system for split voltage domain receiver circuits
US8731410B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2008 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Nov 22, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/4242
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.