HiperSockets SIGA light-sending without outbound queue
US8732264B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2010 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Sep 30, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5077
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Performing logical partition (LPAR)-to-LPAR communication in a network computing environment. Read or write requests to different memory areas of a single computer memory are controlled by a storage control element, where the requests are issued by different multiple operating systems using a general network transfer format. A request is sent by a first operating system to said storage control element, where the request is executed with a processor instruction. A result of the request is received by the same or a second operating system. A modified processor instruction is sent to the storage control element, which implements an execution of the instruction synchronously performed to the sending of the instruction, without buffering the request of the instruction in a dedicated queue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.