Semiconductor device having a first spacer element and an adjacent second spacer element
US8735988B2 · kind B2 · utility
1Cited by
3References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2013 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | Apr 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/8312
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure describes a semiconductor device including a semiconductor substrate and a gate stack disposed on the semiconductor substrate. A first spacer element is disposed on the substrate abutting the first gate stack. In an embodiment, the first spacer element includes silicon nitride. A second spacer element is adjacent the first spacer element. In an embodiment, the second spacer element includes silicon oxide. A raised source and a first raised drain is provided laterally contacting sidewalls of the second spacer element. In an embodiment, a contact directly interfaces with the second spacer element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.