Quiescing input/output (I/O) requests to subsets of logical addresses in a storage for a requested operation
US8738823B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2012 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | Oct 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0659
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a computer program product, system, and method for quiescing Input/Output (I/O) requests to subsets of logical addresses in a storage for a requested operation. A requested operation is received to a subset of addresses in the storage that requires that Input/Output (I/O) requests to the subset of addresses received following the requested operation be quiesced. The subset of addresses is indicated in quiesce information. I/O requests received following the receiving of the requested operation are quiesced when one address subject to the I/O request is included in the subset of addresses. If there are in-progress I/O requests pending against the subset of addresses when the requested operation was received, then the requested operation is indicated as executable. A quiesced I/O request is executed when no address subject to the quiesced I/O request is included in the subset of addresses indicated in the quiesce information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.