Patent · US Active

Non-volatile semiconductor memory device and write-in method thereof

US8738836B2 · kind B2 · utility

5Cited by
11References
8Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 11, 2008
Grant dateMay 27, 2014
Priority date
Expiry dateMar 30, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2216/14
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A non-volatile semiconductor memory device, comprising: a non-volatile memory array, storing multi-values by setting a plurality of different threshold voltages for each memory cell, and a control circuit, controlling a write-in operation to the memory cell array. When data have been written into the memory cell, the control circuit selects an adjacent word line, uses an erasing level to perform write-in which is weaker than the data write-in, and verifies soft programming of the amount of one page, such that a narrow-banded erasing level distribution is realized in an adjacent memory cell.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.